The information society demands various forms and types of display devices. In order to satisfy such a demand, many researches have been made to develop flat panel display devices such as a liquid crystal display device (LCD), a plasma display panel (PDP) and an electro luminescent display (ELD). Some of the flat panel display devices have been already utilized by various equipments.
Among the flat panel display devices, LCDs are widely used as a mobile display device instead of a cathode tube display device due to advantages of the LCD such as lightweight, slim profile and low power consumption. The LCDs are developed in various forms such as monitors for notebook computers and for television.
LCDs display images using characteristics of liquid crystals, optical anisotropy and polarization. Since a liquid crystal molecule is long and thin, arrangement of molecules in a liquid crystal has directivity. The directivity of the molecule arrangement may be controlled by supplying electric field to the liquid crystal.
If the directivity of the molecule arrangement in the liquid crystal is controlled by artificially supplying the electric field to the liquid crystal, the molecule arrangement in the liquid crystal is transformed and the optical anisotropy changes the polarization of the light in a direction of the molecule arrangement of the liquid crystal. That is, the LCD displays image data by controlling the directivity of the molecule arrangement in the liquid crystal.
FIG. 1 is a plan view of a first substrate of a liquid crystal display device according to the related art.
As shown in FIG. 1, a gate line 4 and a data line 6 crossly arranged on the first substrate of the conventional LCD to define a pixel area, and a thin film transistor (TFT) is disposed at the crossing of the gate line 4 and the data line 6. Also, a gate pad 30 is formed on the first substrate to be connected to the gate line 4, and a data pad 25 is formed on the first substrate to be connected to the data line 6.
The TFT includes a gate electrode 5 integrally formed with the gate line 4, an active layer 8 formed on the gate electrode 5, a source electrode 7a integrally formed with the data line 6 on the active layer 8, and a drain electrode 7b separated from the source electrode 7a at a predetermined distance. The drain electrode 7b is connected to a pixel electrode 12 through a drain contact hole H.
The data pad 25 supplies a data voltage to the data line 6 by being connected to a data driver (not shown). The data pad 25 includes a data pad bottom electrode 16 extended from the data line 6 and a data pad top electrode 20 connected to the data pad bottom electrode 16 through a contact hole (H).
The gate pad 30 supplies a scan signal to the gate line 4 by being connected to a gate driver (not shown). The gate pad 30 includes a gate pad bottom electrode 14 extended from the gate line 4 and a gate pad top electrode 18 connected to the gate pad bottom electrode 14 through a plural of contact holes H1 and H2.
FIG. 2 is a cross-sectional view of FIG. 1 taken along a line A-A′.
As shown in FIG. 2, a first gate pad bottom electrode 14a and a second gate pad bottom electrode 14b are formed on a transparent substrate 1 to configure the gate pad bottom electrode 14. A gate insulating layer 11 is formed on the first and the second gate pad bottom electrode 14a and 14b and a passivation layer 13 is formed on the gate insulating layer 11.
A plurality of contact holes H1 and H2 is formed on the transparent substrate 1 where the passivation layer 13 is formed, and a gate pad top electrode 18 is formed on the plurality of the contact holes H1 and H2.
The first gate pad bottom electrode 14a is made of aluminum group metal, the second gate pad bottom electrode 14b is made of a molybdenum (Mo) group metal, and the gate pad top electrode 18 is made of an ITO group metal. The gate pad top electrode 18 is made of material identical to the pixel electrode 12.
While forming the first gate pad bottom electrode 14a made of aluminum on the substrate 1, if the aluminum contacts oxygen in air, the first gate pad bottom electrode 14a is corroded. In order to prevent the first gate pad bottom electrode 14a from being corroded, the second gate pad bottom electrode 14b is formed on the first pad bottom electrode 14a. 
Since the second gate pad bottom electrode 14b is made of a high-resistive metal, the second gate pad bottom electrode 14b is formed on the first pad bottom electrode 14a in a shape of thin film. The first gate pad bottom electrode 14a and the gate pad top electrode 18 are connected through a plurality of contact holes H1 and H2. Since the second gate pad bottom electrode 14b is the high resistive metal as described above, the electricity is not passed through if the gate pad top electrode 18 is connected to the second gate pad bottom electrode 14b. 
Therefore, the first gate pad bottom electrode 14a and the gate pad top electrode 18 are connected through a plurality of contact holes H1 and H2.
Since an insulating layer and a passivation layer are not formed on the gate pad top electrode 18, the gate pad top electrode 18 is exposed to air. If the gate pad top electrode 18 is exposed to air, moisture in air penetrates into the first gate pad bottom electrode 14a through the gate pad top electrode 18.
If the first gate pad bottom electrode 14a contacts the moisture in air, the moisture corrodes the first gate pad bottom electrode 14a made of aluminum. Such a corroded first gate pad bottom electrode 14a disturbs a scan signal to be transferred from the gate driver to the gate line 4 connected to the gate pad 30. Also, the corrosion of the first gate pad bottom electrode 14a may corrode the gate line 4 which is integrally formed with the first pad bottom electrode 14a. 